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  description the LCX016AM is a 3.3cm diagonal active matrix tft-lcd panel addressed by polycrystalline silicon super thin film transistors with a built-in peripheral driving circuit. use of three LCX016AM panels provides a full-color representation. the striped arrangement suitable for data projectors is capable of displaying fine text and vertical lines. the adoption of an advanced on-chip black matrix realizes high picture quality without cross talk by incorporating a high luminance screen and cross talk free circuit. this panel has a polysilicon tft high-speed scanner and built-in function to display images up/down and/or right/left inverse. the built-in 5v interface circuit leads to lower voltage of timing and control signals. the panel contains an active area variable circuit which supports mac17/svga/vga/pc98 data signals by changing the active area according to the type of input signal. in addition, double-speed processed ntsc/pal can also be supported. the adoption of a micro-lens increases the utilization efficiency of incident light, resulting in an optical transmittance of 30% or more with parallel incident light. features number of active dots: 519,000 (1.3-inch, 3.3cm in diagonal) accepts the computer requirements of mac17 (832 624), svga (800 600), vga (640 480) and pc98 (640 400) platforms supports ntsc (640 480) and pal (762 572) by processing the video signal at double speed high optical transmittance: 30% or more (with parallel incident light) built-in cross talk free circuit high contrast ratio with normally white mode: 200 (typ.) built-in h and v drivers (built-in input level conversion circuit, 5v driving possible) up/down and/or right/left inverse display function element structure dots: 832 (h) 624 (v) = 519,168 built-in peripheral driver using polycrystalline silicon super thin film transistors applications liquid crystal data projectors liquid crystal projectors, etc. ?1 LCX016AM pe96219-st 3.3cm (1.3-inch) black-and-white lcd panel sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. preliminary
?2 LCX016AM block diagram 1 18 h shift register (bidirectional scanning) up/down and/or right/left inversion control circuit v shift register (bidirectional scanning) precharge control circuit com pad v shift register (bidirectional scanning) com sig6 sig5 sig4 sig3 sig2 sig1 vss vv dd hv dd mode1 enb dwn pcg vck vst rgt blk hck2 hck1 hst psig 14 15 17 9 20 19 21 22 12 11 10 8 23 16 7 6 4 3 5 2 24 black frame control circuit black frame control circuit 13 black frame control circuit mode2 mode3 input signal level shifter circuit
?3 LCX016AM absolute maximum ratings (v ss = 0v) h driver supply voltage hv dd ?.0 to +20 v v driver supply voltage vv dd ?.0 to +20 v common pad voltage com ?.0 to +17 v h shift register input pin voltage hst, hck1, hck2, ?.0 to +17 v rgt v shift register input pin voltage vst, vck, pcg, ?.0 to +17 v blk, enb, dwn mode1, mode2, mode3 video signal input pin voltage sig1, sig2, sig3, sig4, ?.0 to +15 v sig5, sig6, psig operating temperature topr ?0 to +70 ? storage temperature tstg ?0 to +85 ? operating conditions (v ss = 0v) supply voltage hv dd 15.5 0.3v vv dd 15.5 0.3v input pulse voltage (vp-p of all input pins except video signal and uniformity improvement signal input pins) vin 5.0 0.5v pin description pin no. 1 2 3 4 5 6 7 8 9 10 11 12 psig sig4 sig3 sig5 sig2 sig6 sig1 hv dd rgt mode3 mode2 mode1 13 14 15 16 17 18 19 20 21 22 23 24 hst hck1 hck2 vss blk enb vck vst pcg dwn vv dd com start pulse for h shift register drive clock pulse for h shift register drive clock pulse for h shift register drive gnd (h, v drivers) black frame display pulse enable pulse for gate selection clock pulse for v shift register drive start pulse for v shift register drive improvement pulse for uniformity drive direction pulse for v shift register (h: normal, l: reverse) power supply for v driver common voltage of panel symbol description pin no. symbol description uniformity improvement signal video signal 4 to panel video signal 3 to panel video signal 5 to panel video signal 2 to panel video signal 6 to panel video signal 1 to panel power supply for h driver drive direction pulse for h shift register (h: normal, l: reverse) display area switching 3 display area switching 2 display area switching 1
?4 LCX016AM input equivalent circuit to prevent static charges, protective diodes are provided for each pin except the power supplies. in addition, protective resistors are added to all pins except the video signal inputs. all pins are connected to v ss with a high resistor of 1m (typ.). the equivalent circuit of each input pin is shown below: (resistance value: typ.) input lc level conversion circuit (single-phase input) 2.5k w 2.5k w vv dd input level conversion circuit (single-phase input) 250 w 250 w hv dd input level conversion circuit (single-phase input) 2.5k w 2.5k w hv dd input hv dd 250 w 250 w 250 w 250 w level conversion circuit (2-phase input) input hv dd signal line (1) sig1, sig2, sig3, sig4, sig5, sig6, psig (2) hck1, hck2 (3) rgt (4) hst (5) pcg, vck (6) vst, blk, enb, dwn, mode1, mode2, mode3 (7) com 1m w input 1m w 1m w 1m w level conversion circuit (single-phase input) 250 w 250 w vv dd input 1m w 1m w 1m w vv dd 1m w
?5 LCX016AM input signals 1. input signal voltage conditions (v ss = 0v) item h shift register input voltage hst, hck1, hck2, rgt (low) (high) (low) (high) vhil vhih vvil vvih vvc vsig vcom vpsig ?.5 4.5 ?.5 4.5 vvc ?4.5 vvc 4.3 0.0 5.0 0.0 5.0 7.0 7.0 vvc ?0.4 vvc 4.5 0.4 5.5 0.4 5.5 vvc + 4.5 vvc 4.7 v v v v v v v v v shift register input voltage mode1, mode2, mode3, blk, vst, vck, pcg, enb, dwn video signal center voltage video signal input range * 1 common voltage of panel * 2 uniformity improvement signal input voltage (psig) * 3 symbol min. typ. max. unit * 1 input video signal shall be symmetrical to vvc. * 2 common voltage of the panel shall be adjusted to vvc ?0.4v. * 3 uniformity improvement signal psig shall be the same polarity as video signals sig1 to 6. level conversion circuit the LCX016AM has a built-in level conversion circuit in the clock input unit on the panel. the input signal level increases to hv dd or vv dd . the v cc of external ics are applicable to 5 0.5v.
?6 LCX016AM 2. clock timing conditions (ta = 25?) (mac17 mode: fhckn = 4.8mhz, fvck = 24.9khz) * 4 hckn means hck1 and hck2. * 5 blk is the timing during svga mode (fhckn = 4.0mhz, fvck = 24.0khz). hst rise time hst fall time hst data set-up time hst data hold time hckn rise time * 4 hckn fall time * 4 hck1 fall to hck2 rise time hck1 rise to hck2 fall time vst rise time vst fall time vst data set-up time vst data hold time vck rise time vck fall time enb rise time enb fall time vck rise/fall to enb rise time enb pulse width pcg rise time pcg fall time pcg fall to vck rise/fall time pcg pulse width blk rise time blk fall time blk fall to vst rise time blk pulse width trhst tfhst tdhst thhst trhckn tfhckn to1hck to2hck trvst tfvst tdvst thvst trvck tfvck trenb tfenb tdenb twenb trpcg tfpcg tovck twpcg trblk tfblk tovst twblk ?5 ?5 50 50 0 0 10 10 500 2500 1000 1200 33 21 30 30 30 30 15 15 100 100 100 100 100 100 30 30 100 100 ns ? ns item symbol min. typ. max. unit hst hck vst vck enb pcg blk * 5 ?
?7 LCX016AM * 6 definitions: the right-pointing arrow ( ) means +. the left-pointing arrow ( ) means ? the black dot at an arrow ( ) indicates the start of measurement. hst rise time hst hck hst fall time hst data set-up time hst data hold time hckn rise time * 3 hckn fall time * 3 hck1 fall to hck2 rise time hck1 rise to hck2 fall time hckn * 3 duty cycle 50% to1hck = 0ns to2hck = 0ns hckn * 3 duty cycle 50% to1hck = 0ns to2hck = 0ns hckn * 3 duty cycle 50% to1hck = 0ns to2hck = 0ns trhst tfhst tdhst thhst trhckn tfhckn to1hck to2hck item symbol waveform conditions 90% 10% 10% 90% hst trhst tfhst 50% 50% * 6 hst hck1 tdhst thhst 50% 50% * 3 hckn 10% 10% 90% 90% trhckn tfhckn 50% 50% * 6 hck1 to2hck to1hck 50% 50% hck2
?8 LCX016AM vck enb vck rise time vck fall time enb rise time enb fall time vck rise/fall to enb rise time enb pulse width trvck tfvck trenb tfenb tdenb twenb item symbol waveform conditions vck 10% 10% 90% 90% trvckn tfvckn 90% 90% 10% 10% tfen tren enb enb 50% 50% 50% twenb tdenb vck * 6 pcg * 7 pcg rise time trpcg pcg fall time tfblk pcg rise to vck rise/fall time tovst pcg pulse width twblk blk blk rise time trpcg blk fall time tfpcg blk fall to vst rise time blk pulse width tovck twblk pcg 50% 50% 50% twpcg tovck vck * 6 blk 50% 50% tovst vst * 6 50% twblk * 7 input the pulse obtained by taking the or of the above pulse (pcg) and blk to the pcg input pin. vst rise time vst vst fall time vst data set-up time vst data hold time trvst tfvst tdvst thvst 90% 10% 10% 90% vst trvst tfvst 50% 50% * 6 vst vck tdvst thvst 50% 50%
?9 LCX016AM electrical characteristics (ta = 25?, hv dd = 15.5v, vv dd = 15.5v) 1. horizontal drivers item input pin capacitance hckn hst input pin current hck1 hck2 hst rgt video signal input pin capacitance current consumption chckn chst csig ih hck1 = gnd hck2 = gnd hst = gnd rgt = gnd hckn: hck1, hck2 (4.8mhz) 12 12 ?50 ?00 ?50 ?0 140 5.0 pf pf ? ? ? ? pf ma symbol min. typ. max. unit condition 2. vertical drivers item input pin capacitance vck vst input pin current vck pcg, vst, enb, dwn, blk, mode1, mode2, mode3 current consumption cvck cvst iv 12 12 ?50 ?0 2.0 pf pf ? ? ma symbol min. typ. max. unit condition 3. total power consumption of the panel item total power consumption of the panel (mac17) pwr 100 mw symbol min. typ. max. unit 4. pin input resistance item pin ?v ss input resistance rpin 0.4 1 m symbol min. typ. max. unit vck = gnd pcg, vst, enb, dwn, blk, mode1, mode2, mode3 = gnd vck: (24.9khz) 5. uniformity improvement signal item input pin capacitance for uniformity improvement signal cpsigo 12 nf symbol min. typ. max. unit
?10 LCX016AM electro-optical characteristics (ta = 25?, mac17 mode) item contrast ratio 25? 25? 25? 60? 25? 60? 25? 60? 0? 25? 0? 25? 60? 25? 25? cr t rv 90-25 gv 90-25 bv 90-25 rv 90-60 gv 90-60 bv 90-60 rv 50-25 gv 50-25 bv 50-25 rv 50-60 gv 50-60 bv 50-60 rv 10-25 gv 10-25 bv 10-25 rv 10-60 gv 10-60 bv 10-60 ton0 ton25 toff0 toff25 f yt60 ctk 200 20 1.41 1.55 1.67 1.33 1.46 1.58 1.75 1.85 1.94 1.67 1.75 1.84 2.25 2.34 2.43 2.15 2.23 2.31 30.6 12.0 99.4 28.4 ?8 0 5 1 2 3 4 5 6 7 % v ms db s % optical transmittance v-t characteristics v 90 v 50 on time off time v 10 response time flicker image retention time cross talk symbol measurement method min. typ. max. unit reflection preventive processing when a phase substrate which rotates the polarization axis is used to adjust to the polarization direction of a polarization screen or prism, use a phase substrate with reflection preventive processing on the surface. this prevents characteristic deterioration caused by luminous reflection.
?11 LCX016AM measurement system i measurement system ii luminance meter measurement equipment light detector measurement equipment screen: made by sony (vps-120fh: gain 2.8, glass beaded type) or equivalent projection lens: focal distance 80mm, f1.9 light source: 155w metal haloid arc lamp (color temperature 7500k 500) ( 24, sensor area: 7mm f ) optical fiber lcd panel light receptor lens drive circuit light source basic measurement conditions (1) driving voltage hv dd = 15.5v, vv dd = 15.5v vvc = 7.0v, vcom = 6.6v (2) measurement temperature 25? unless otherwise specified. (3) measurement point one point in the center of the screen unless otherwise specified. (4) measurement systems two types of measurement systems are used as shown below. (5) video input signal voltage (vsig) vsig = 7.0 v ac [v] (v ac = signal amplitude) screen lcd projector approx. 2000mm 1. contrast ratio contrast ratio (cr) is given by the following formula (1). cr = l (white) ... (1) l (black) l (white): surface luminance of the center of the screen at the input signal amplitude v ac = 0.5v. l (black): surface luminance of the center of the screen at v ac = 4.5v. both luminosities are measured by system i .
?12 LCX016AM 2. optical transmittance optical transmittance (t) is given by the following formula (2). white luminance t = 100 [%] ... (2) luminance of light source "white luminance" means the maximum luminance on the screen at the input signal amplitude v ac = 0.5v on measurement system i . 3. v-t characteristics v-t characteristics, or the relationship between signal amplitude and the transmittance of the panels, are measured by system ii by inputting the same signal amplitude v ac to each input pin. v 90 , v 50 , and v 10 correspond to the voltages which define 90%, 50%, and 10% of transmittance respectively. 4. response time response time ton and toff are defined by formulas (5) and (6) respectively. ton = t1 ?ton ...(5) toff = t2 ?toff ...(6) t1: time which gives 10% transmittance of the panel. t2: time which gives 90% transmittance of the panel. the relationships between t1, t2, ton and toff are shown in the right figure. 90 50 10 v 90 v 50 v 10 v ac ?signal amplitude [v] transmittance [%] input signal voltage (waveform applied to the measured pixels) 4.5v 0.5v 7.0v 0v optical transmittance output waveform 100% 90% 10% 0% ton t1 ton toff t2 toff
?13 LCX016AM 5. flicker flicker (f) is given by formula (7). dc and ac (mac17/svga/vga/pc98/ntsc: 30hz, rms, pal: 25hz, rms) components of the panel output signal for gray raster * mode are measured by a dc voltmeter and a spectrum analyzer in system ii . f [db] = 20log { ac component } ...(7) dc component 6. image retention time apply the monoscope signal to the lcd panel for 60 minutes and then change this signal to the gray scale of vsig = 7.0 v ac (v ac : 3 to 4v). judging by sight at the v ac that holds the maximum image retention, measure the time till the residual image becomes indistinct. * monoscope signal conditions: vsig = 7.0 4.5 or 2.0 [v] (shown in the right figure) vcom = 6.6v 7. cross talk cross talk is determined by the luminance differences between adjacent areas represented by wi' and wi (i = 1 to 4) around a black window (vsig = 4.5 v/1v). cross talk value ctk = 100 [%] * each input signal voltage for gray raster mode is given by vsig = 7.0 v 50 [v] where: v 50 is the signal amplitude which gives 50% of transmittance in v-t characteristics. black level white level vsig waveform 7.0v 0v 4.5v 2.0v 4.5v 2.0v w1 w1 ' w3 w3 ' w2 w2 ' w4 ' w4 wi' ?wi wi
?14 LCX016AM 1. dot arrangement the dots are arranged in a stripe. the shaded area is used for the dark border around the display. 4 dots 840 dots 4 dots 626 dots 1 dot 1 dot 832 dots 624 dots gate sw gate sw gate sw active area photo-shielding
?15 LCX016AM 2. lcd panel operations [description of basic operations] a vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse to every 624 gate lines sequentially in a single horizontal scanning period. (in mac17 mode) a horizontal driver, which consists of horizontal shift registers, gates and cmos sample-and-hold circuits, applies selected pulses to every 832 signal electrodes sequentially in a single horizontal scanning period. these pulses are used to supply the sampled video signal to the row signal lines. vertical and horizontal shift registers address one pixel, and then thin film transistors (tfts; two tfts) turn on to apply a video signal to the dot. the same procedures lead to the entire 624 832 dots to display a picture in a single vertical scanning period. the data and video signals shall be input with the 1h-inverted system. [description of operating mode] this lcd panel can change the active area by displaying a black frame to support various computer or video signals. the active area is switched by mode1, 2 and 3. the active area setting modes are shown below. mode1 mode2 mode3 display mode ll l h h l l h l h l mac17 832 624 svga 800 600 pal 762 572 vga/ntsc 640 480 pc98 640 400 l l l h this lcd panel has the following functions to easily apply to various uses, as well as various broadcasting systems. right/left inverse mode up/down inverse mode these modes are controlled by two signals (rgt and dwn). the right/left and/or up/down setting modes are shown below. right/left and/or up/down mean the direction when the pin 1 marking is located at the right side with the pin block upside. to locate the active area in the center of the panel in each mode, polarity of the start pulse and clock phase for both the h and v systems must be varied. the phase relationship between the start pulse and the clock for each mode is shown on the following pages. rgt mode right scan left scan h l dwn mode down scan up scan h l
?16 LCX016AM vst (dwn = h) vst (dwn = l) (1.3) pal vd 12 vertical display cycle 572h vck 3 4 569 570 571 572 vst (dwn = h) vst (dwn = l) (1.2) svga vertical display cycle 600h vd 12 vck 34 597 598 599 600 vd vst (dwn = h) 12 vertical display cycle 624h vck 3 4 621 622 623 624 (1.1) mac17 vst (dwn = l) vd 12 vertical display cycle 480h vck 3 4 477 478 479 480 (1.4) vga/ntsc vd 12 vertical display cycle 400h vck 3 4 397 398 399 400 (1.5) pc98 vst (dwn = h) vst (dwn = l) vst (dwn = h) vst (dwn = l) (1) vertical direction display cycle
?17 LCX016AM horizontal display cycle hst hck1 12 3 4 137 138 139 140 (2.1.1) mac17, rgt = h hck2 horizontal display cycle hst hck1 12 4 137 138 139 140 (2.1.2) mac17, rgt = l hck2 (2.2.1) svga, rgt = h 3 horizontal display cycle hst hck1 1234 131 132 133 134 hck2 hd hd hd (2.2.2) svga, rgt = l horizontal display cycle hst hck1 hck2 hd 1 2 3 4 131 132 133 134 (2) horizontal direction display cycle
?18 LCX016AM horizontal display cycle hst hck1 12 34 105 106 107 108 (2.4.1) vga/ntsc/pc98, rgt = h hck2 horizontal display cycle hst hck1 12 3 4 105 106 107 108 (2.4.2) vga/ntsc/pc98, rgt = l hck2 horizontal display cycle hst hck1 125 126 127 128 (2.3.1) pal, rgt = h hck2 horizontal display cycle hst hck1 12 3 4 125 126 127 128 (2.3.2) pal, rgt = l hck2 hd hd hd hd 1234
?19 LCX016AM 3. 6-dot simultaneous sampling the horizontal shift register samples signals sig1 to sig6 simultaneously. this requires phase matching between signals sig1 to sig6 to prevent the horizontal resolution from deteriorating. thus, phase matching between each signal is required using an external signal delaying circuit before applying the video signal to the lcd panel. the block diagram of the delaying procedure using the sample-and-hold method is as follows. the following phase relationship diagram indicates the phase setting for right scan (rgt = high level). for left scan (rgt = low level), the phase settings for signals sig1 to sig6 are exactly reversed. s/h ck1 ck2 sig3 sig6 sig1 LCX016AM sig3 sig6 sig1 sig2 sig2 sig4 sig4 sig5 sig5 ck3 ck4 ck5 s/h s/h s/h s/h s/h ck6 s/h s/h s/h s/h s/h 6 4 3 5 7 8 hckn ck1 ck3 ck5 ck2 ck4 ck6 (right scan)
?20 LCX016AM display system block diagram an example of display system is shown below. timing generator cxa1853aq r-in g-in cxa1853aq b-in hd vd c.sync s/h s/h s/h lcx016 r cxa1853aq sh1, 2, 3, 4 sha, b, c lcx016 g lcx016 b
?21 LCX016AM notes on handling (1) static charge prevention be sure to take the following protective measures. tft-lcd panels are easily damaged by static charges. a) use non-chargeable gloves, or simply use bare hands. b) use an earth-band when handling. c) do not touch any electrodes of a panel. d) wear non-chargeable clothes and conductive shoes. e) install conductive mats on the working floor and working table. f) keep panels away from any charged materials. g) use ionized air to discharge the panels. (2) protection from dust and dirt a) operate in a clean environment. b) when delivered, the panel surface (polarizer) is covered by a protective sheet. peel off the protective sheet carefully so as not to damage the panel. c) do not touch the panel surface. the surface is easily scratched. when cleaning, use a clean-room wiper with isopropyl alcohol. be careful not to leave a stain on the surface. d) use ionized air to blow dust off the panel. (3) other handling precautions a) do not twist or bend the flexible pc board especially at the connecting region because the board is easily deformed. b) do not drop the panel. c) do not twist or bend the panel or panel frame. d) keep the panel away from heat sources. e) do not dampen the panel with water or other solvents. f) avoid storing or using the panel at a high temperature or high humidity, which may result in panel damages.
?22 LCX016AM package outline unit: mm active area electrode (enlarged) p 1.0 23 = 23.0 0.1 0.6 0.05 1.0 0.15 0.5 0.15 4.0 0.4 pin24 pin1 38.0 0.15 (26.6) (20.0) 21.0 0.25 f 2.1 0.05 (62.0) 104.0 1.4 37.0 0.1 42.0 0.15 4-r2.5 25.0 0.15 3.7 0.1 thickness of the connector 0.3 0.05 1.8 0.1 polarizing axis 2.5 0.1 19.0 0.25 4.0 0.1 2.1 0.05 30.0 0.1 3- f 2.3 0.05 c0.8 the rotation angle of the active area relative to h and v is 1? incident light weight 7.6g 1 2 3 4 5 6 7 description molding material outside frame reinforcing board reinforcing material polarizing film f p c no 1 2 3 4 5 6 cover 1 7 8 cover 2 8


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